|
A more detailed description of each test is at here. |
STEP |
Video enabled ? |
ACTION |
IF ERROR |
COMMENT |
|---|---|---|---|---|
| 1 | No | Send checkpoint 33 | 33h chosen because it is very distinctive. See note 1 below. | |
| 2 | No | Just in case, disable NMI interrupts. | A good motherboard will automatically do that at power-on time, via hardware. | |
| 3 | No | Set up 'unexpected NMI' handler. | See note 2 below. | |
| 4 | No | Send checkpoint 00 | ||
| 5 | No | Part 1 of CPU test. | If an error, send checkpoint 80 (hex) then halt. | |
| 6 | No | Send checkpoint 01 | ||
| 7 | No | Part 2 of CPU test. | If an error, send checkpoint 81 (hex) then halt. | |
| 8 | No | Send checkpoint 02 | ||
| 9 | No | See if 8-bit checksum of ROM is 00h. | If not 00h, send checkpoint 82 (hex) then halt. | ROM = Ruud's Diagnostic ROM |
| 10 | No | Send checkpoint 03 | ||
| 11 | No | Initialise the 8255 chip. | Also disables turbo mode for compatible motherboards. | |
| 12 | No | Send checkpoint 04 | ||
| 13 | No | • Beep the speaker three times: short-long-short. • On the IBM 5150, single-click the relay. |
Short-long-short beeping chosen because it is very distinctive. See note 3 below. |
|
| 14 | No | Send checkpoint 06 | ||
| 15 | No | Disable video output from the MDA/CGA card. | ||
| 16 | No | Send checkpoint 07 | ||
| 17 | No | Look for MDA or CGA video RAM. | If neither found, or the RAM is discovered faulty, send checkpoint 83 (hex) then halt. |
Video RAM (the unused bit) will be used for the stack and some variables. |
| 18 | No | Send checkpoint 08 | ||
| 19 | No | As applicable, initialise the MDA card or CGA card. | ||
| 20 | No | Send checkpoint 09 | ||
| 23 | No | Clear the video screen. | ||
| 24 | No | Send checkpoint 0A | ||
| 25 | No | Set the correct video mode, and make the cursor invisible. | ||
| 26 | No | Send checkpoint 0B | ||
| 27 | No | Clear our variables. | Zero the variables that the diagnostic stores in video RAM. | |
| 28 | No | Send checkpoint 0C | ||
| 29 | Yes | On-screen, display the name of the program and the version. | ||
| 30 | Yes | Send checkpoint 0D | ||
| 31 | Yes | Display "Testing CPU" | ||
| 32 | Yes | Part 1 of CPU test. | If an error, send checkpoint 8D (hex) then halt. | |
| 33 | Yes | Send checkpoint 0E | ||
| 34 | Yes | Part 2 of CPU test. | If an error, send checkpoint 8E (hex) then halt. | |
| 35 | Yes | Send checkpoint 0F | ||
| 36 | Yes | Display "Diagnostic ROM checksum" | ||
| 37 | Yes | See if 8-bit checksum of ROM is 00h. | If not 00h, send checkpoint 8F (hex) then halt. | |
| 38 | Yes | Send checkpoint 12 (hex) | ||
| 39 | Yes | Quote: 'Disable the DMA controller' | ||
| 40 | Yes | Quote: 'Disable the speakers and enable timer 2' | ||
| 41 | Yes | Send checkpoint 16 (hex) | ||
| 42 | Yes | Display "8253 timer channel 0" | ||
| 43 | Yes | Test 8253 timer channel 0. Mode 2 only. | If an error, send checkpoint 96 (hex). | |
| 44 | Yes | Send checkpoint 18 (hex) | ||
| 45 | Yes | Display "8253 timer channel 1" | ||
| 46 | Yes | Test 8253 timer channel 1. Mode 2 only. | If an error, send checkpoint 98 (hex) then halt. | Halt beause with a failing timer 1, there won't be any refresh of motherboard and card RAM. That compromises a later test of that RAM. |
| 47 | Yes | Send checkpoint 1A | ||
| 48 | Yes | Display "8253 timer channel 2" | ||
| 49 | Yes | Test 8253 timer channel 2. Mode 2 only. | If an error, send checkpoint 9A. | |
| 50 | Yes | Send checkpoint 1C | ||
| 51 | Yes | Display "8237A DMA controller" | ||
| 52 | Yes | Test the 8237A DMA controller. | If an error, send checkpoint 9C then halt. | |
| 53 | Yes | Send checkpoint 24 (hex) | ||
| 54 | Yes | Configure the 8237 DMA controller | Includes preparing for RAM refresh by appropriately configuring channel 0. | |
| 55 | Yes | Send checkpoint 25 (hex) | ||
| 56 | Yes | Display "Hot timer 1 check" | ||
| 57 | Yes | Look for a 'hot' timer 1' | If error, send checkpoint A5. | The DREQ0 pin on the 8237A DMA controller is expected to be LOW. |
| 58 | Yes | Send checkpoint 26 (hex) | ||
| 59 | Yes | Initialise channel 1 on the 8253 timer chip. | One pulse per approximately 15 µs. See here. | |
| 60 | Yes | Send checkpoint 27 (hex) | ||
| 61 | Yes | Display "RAM parity error latches" | ||
| 62 | Yes | Step 1: Clear/disable the two 'RAM parity error' latches. Step 2: Verify that neither of the two latches are showing as set. |
If error, send checkpoint A7. | |
| 63 | Yes | Send checkpoint 2A | ||
| 64 | Yes | Display "Check first 2 KB of RAM" | ||
| 65 | Yes | Check the first 2 KB of RAM. | If an error, send checkpoint AA then put error details on-screen, then halt the CPU. | |
| 66 | Yes | Send checkpoint 32 (hex) | ||
| 67 | Yes | Display "Found RAM:" | ||
| 68 | Yes | See how much Conventional memory can be found. | Strickly speaking, what this diagnostic reports is the top address of RAM. For example, in the misconfiguration shown at here, the diagnostic will report 640 KB. Same if a RAM card goes faulty in a way that creates a gap between motherboard RAM and card RAM. |
|
| 69 | Yes | Send checkpoint 34 (hex) | ||
| 70 | Yes | Display the amount of RAM found. | ||
| 71 | Yes | Send checkpoint 35 (hex) | ||
| 72 | Yes | Display "Testing RAM - Data" | ||
| 73 | Yes | Do a data test of the found RAM. | If an error, send checkpoint B5 then put error details on-screen, then halt the CPU. | |
| 74 | Yes | Send checkpoint 37 (hex) | ||
| 75 | Yes | Display "Testing RAM - Address" | ||
| 76 | Yes | Adddress test of the found RAM - Part 1 of 2. | If an error, send checkpoint B7 then put error details on-screen, then halt the CPU. | Tested as how IBM do it; a test done within each 16K block. |
| Yes | Adddress test of the found RAM - Part 2 of 2. | If an error, send checkpoint B8 then put error details on-screen, then halt the CPU. | Step 1: At all addresses that are a multiple of 1K, write a unique value into the first address. Step 2: Go and read back all of those unique values. |
|
| 77 | Yes | Send checkpoint 39 (hex) | ||
| 78 | Yes | Display "Testing RAM - Refresh" | ||
| 79 | Yes | Do a test of RAM refresh. | If an error, send checkpoint B9 then put error details on-screen, then halt the CPU. | 90 second delay between test write then read-back. |
| 80 | Yes | Send checkpoint 3E (hex) | ||
| 81 | Yes | Display "8259 interrupt controller" | ||
| 82 | Yes | Test the 8259 interrupt controller. | If an error, send checkpoint BE. | |
| 83 | Yes | Send checkpoint 40 (hex) | ||
| 84 | Yes | Display "Hot IRQ interrupts". | ||
| 85 | Yes | Check if the 8259 sees an interrupt (IRQ0 to IRQ7) when one is unexpected. | If an interrupt, send checkpoint C0. | |
| 86 | Yes | Send checkpoint 42 (hex) | ||
| 87 | Yes | Display "Checking interrupt IRQ0". | ||
| 88 | Yes | Verify correct operation of Interrupt 0. | If an error, send checkpoint C2. | |
| 89 | Yes | Send checkpoint 46 (hex) | ||
| 90 | Yes | Display "Hot NMI". | ||
| 91 | Yes | Verify that the 8088 CPU is not receiving an NMI. | If an error (NMI present), send checkpoint C6. | |
| 92 | Yes | Send checkpoint 4C (hex) | ||
| 93 | Yes | Display "8087 coprocessor present?". | ||
| 94 | Yes | See if an 8087 coprocessor is present. | If an error, send checkpoint CC. | Will fail if an 8087 is not fitted. |
| 95 | Yes | Send checkpoint 4E (hex) | ||
| 96 | Yes | Display "Keyboard responds to reset". | ||
| 97 | Yes | Software reset the keyboard, and see if in response, the keyboard sends the expected byte of AA. | If an error, send checkpoint CE. | |
| 98 | Yes | Send checkpoint 50 (hex) | ||
| 99 | Yes | Display "Keyboard stuck key". | ||
| 100 | Yes | See if the keyboard is reporting a stuck key. | If an error, send checkpoint D0. | |
| 101 | Yes | Send checkpoint 52 (hex) | ||
| 102 | Yes | Display "Check floppy controller". | ||
| 103 | Yes | See if a reset of the floppy controller is successful. | If an error, send checkpoint D2. | |
| 104 | Yes | Send checkpoint 54 (hex) | ||
| 105 | Yes | Display "Trying to read a floppy". | ||
| 106 | Yes | Try to read a track on a 360K floppy. | If an error, send checkpoint D4. | 360K floppy drive required. |
| 107 | Yes | Send checkpoint 60 (hex) | ||
| 108 | Yes | Display "Check ROM at F4000". | IBM 5150: IC socket U28. IBM 5160: IC socket U19. Diagram at here. | |
| 109 | Yes | Verify that 8 KB at F4000 has an 8-bit checksum of 00. | ||
| 110 | Yes | Send checkpoint 61 (hex) | ||
| 111 | Yes | Display "Check ROM at F6000". | IBM 5150: IC socket U29. IBM 5160: IC socket U19. Diagram at here. | |
| 112 | Yes | Verify that 8 KB at F6000 has an 8-bit checksum of 00. | ||
| 113 | Yes | Send checkpoint 62 (hex) | ||
| 114 | Yes | Display "Check ROM at F8000". | IBM 5150: IC socket U30. IBM 5160: IC socket U18. Diagram at here. | |
| 115 | Yes | Verify that 8 KB at F8000 has an 8-bit checksum of 00. | ||
| 116 | Yes | Send checkpoint 63 (hex) | ||
| 117 | Yes | Display "Check ROM at FA000". | IBM 5150: IC socket U31. IBM 5160: IC socket U18. Diagram at here. | |
| 118 | Yes | Verify that 8 KB at FA000 has an 8-bit checksum of 00. | ||
| 119 | Yes | Send checkpoint 64 (hex) | ||
| 120 | Yes | Display "Check ROM at FC000". | IBM 5150: IC socket U32. IBM 5160: IC socket U18. Diagram at here. | |
| 121 | Yes | Verify that 8 KB at FC000 has an 8-bit checksum of 00. | ||
| 122 | Yes | Send checkpoint 6A (hex) | ||
| 123 | Yes | Display the switch setting | ||
| 124 | Yes | Send checkpoint 72 (hex) | ||
| 125 | Yes | Update the 'Completed passes' figure | ||
| 126 | Yes | Send checkpoint 74 (hex) |
| Note 1 | Possible problems in using 00 instead could be: • 00 might be the default power-on display of some parallel/LPT monitoring devices. • Some parallel/LPT monitoring devices may register a 00 (and other bytes) at power-on time. |
| Note 2 | Low RAM is untested at this point, but do it anyway. In fact, there may be no low RAM at all, but do it anyway. If the 'unxepected NMI' handler gets called, checkpoint 99 will be sent, and *** UNEXPECTED NMI *** be displayed on a MDA/CGA screen. |
| Note 3 | Yes, we are taking the chance that the circuitry involved in beeping the speaker is working. No beeps might be because: • No speaker connected to motherboard. • Diagnostic ROM not created properly. • Diagnostic ROM has started to execute, but circuitry involved in beeping the speaker is faulty. |
